Parallel cyberdecks for Shadowrun 2nd Edition

Parallel cyberdecks for Shadowrun 2nd Edition

As I was working on the cyberdeck of one of my decker characters - Turing, actually - I started thinking about how odd the system architecture the cyberdecks in Shadowrun uses, really is. The single processing unit architecture, where one processor does all the work, is what we have in PCs and suchlike today. Even super numbercrunchers like Cray use that architecture. Yet we know that parallel machines in many cases can and do run circles around the single processor architecture - in fact, mainframe technology doesn't use one processor any more, but have four or more working in parallel.

Although it is easy to consider Evasion, Bod, Masking and Sensor as sub-processors of the MPCP, this is still a single processor architecture. The mainframes in Shadowrun, however, are "massively parallel", which would indikate 256 or more processors in parallel. Or at least a hell of a lot more than, say, 4 processors. Clearly, there has to be some technological reason why cyberdecks follow the single processor architecture when parallel networks offer many benefits, in addition to increasing the processing power of the computer. Thus, SOTA can be advanced to include parallel cyberdecks for Shadowrun.


The Master Parallel Process Control Program

The Master Parallel Process Control Program, or MP2CP as it is more affectionately known, represents the SOTA of cyberdecks in 2057. Although the technology is in its infancy, it allows for a massive increase in processing power, so massive that portable mainframes no longer is something deckers can only have wet dreams about.

The key to integrating parallel processors to a funcitoning unit, is the MP2CP program. Replacing the MPCP program, it is the master operating system dividing tasks to the various processors working in parallel, and coordinates system resources. Thus, if a decker character wants to make a parallel cyberdeck, he'll have to write the MP2CP program as an additional step in creating the cyberdeck.


Creating a parallel cyberdeck

Before writing the MPCP program for the processors that are to be put into the p-deck, the decker has to write the software to coordinate the processors of the p-deck, i.e. the MP2CP program. He then has to cook a chip with the software on, and install it in the p-deck before the p-deck will be truly parallel.

First, the decker has to decide how many processors the p-deck will have. The minimum rating of the separate MPCPs to be installed, as well as the rating of the MPPCP program are directly affected by this choice. The minimum rating of the MPCP programs needed for the separate processors is [no. of processors]+2. Thus, if the decker wants to have a p-deck with four processors, the minimum rating for the MPCP for the separate processors has to be at least (4+2) MPCP 6. If the decker already has the code for an MPCP of sufficient rating, the decker can use this code, or utilize it to lower the time needed to write the new MPCP code. It is important to note that this is the minimum rating of the MPCP - the MPCP rating might well be 8 rather than MPCP 6 for the previously mentioned p4-deck (or just 'peefour', i.e. p4), thereby increasing the performance of the deck.

Then, the decker has to write the MPPCP program, and install it on the p-deck. The rating of the MPPCP program is [no. of subprocessors]+ [MPCP rating of the system], i.e., continuing the example on the p4 above, if the chosen MPCP rating was 6, the MPPCP rating is 10, and if the chosen MPCP rating was 8, the MPPCP rating is 12. The more powerful the MPCP, the more difficult it is to get them to cooperate. If a reality filter is incorporated in the MPCP, the true rating of the MPCP is used, and the rating of the MPPCP is increased by one.

The MPPCP program allows the p-deck to coordinate its resources more effectively. However, the multiple processor architecture has some unusual effects on the way the p-deck behaves. First and foremost, each processor acts as a separate deck, with separate Active Memory and Storage Memory. I/O speed, Response Increase and so on is common for the deck, except that Response Increase is modified in the following way: Although the maximum rating of the Response Increase still is MPCP/4, the TN for writing the Response Increase software is the rating of the MPPCP.

When the p-deck is finished, the unique nature of the p-deck comes into play by giving it another mode - mainframe mode. The p-deck can be run as a mainframe, with a Security Value of (square root of number of processors), dropping fractions. I.e., a p2 can act as a mainframe rating 1, while a p4 can act as a mainframe rating 2, and a (theoretical) p9 would act as a mainframe rating 3. It isn't much, but it is sometimes better than nothing.

It is important to note that when running the p-deck in mainframe mode, it acts just like a mainframe, however small it is. Thus, it can run the mainframe programming suite, and it gives the same bonuses a mainframe gives when writing programs on it as per VR2.0.


The MPICTerm

In order to more clearly illustrate how a p-deck works, I'll give an example using one of the first p-decks made; the MPICTerm, or Multiple Parallel Integrated CyberTerminal. The MPICTerm is a p3-8 deck, i.e. a three processor MPCP 8 deck. Thus, the breakdown in tasks is as follows:

MPCP Construction:
Software Task: No change. The MPICTerm doesn't have a reality filter, so it is a straightforward task of writing an MPCP 8 program.
Cook Task: No change, although it must be repeated (successfully) a number of times equal to the number of processors. In the case of the MPICTerm, the Cook Task is repeated three times, since it is a p3 deck.
Installation Task: No change, although it must be repeated (successfully) a number of times equal to the number of processors. In the case of the MPICTerm, the Installation task is repeated three times also.

MPPCP Construction: (new)
Software Task: MPCP rating+no. of processors, which for the MPICTerm is MPPCP 11, with a multiplier of 10.
Cook Task: Time equal to MPPCP rating x 4, test, parts and tools equal to that of an equivalent MPCP.
Installation: Time equal to MPPCP rating x 3 days, test, parts and tools equal to that of an equivalent MPCP.

Persona Chip Construction:
Unchanged. Although the p-deck might have more processors, it doesn't multiplex the icon of the user. However, the decker can place the Personas in any MPCP the decker wants. In the case of the MPICTerm, it places Sensor 8 in MPCP 1, Evasion 8 in MPCP 2, and Bod in MPCP 3. As it is a legal cyberdeck, though bleeding edge, it doesn't have a Masking Persona program.

Active Memory:
Each of the MPCPs have their own active memory, and need only to repeat the Installation task a maximum number of times equal to the number of processors. Although not very efficient, it is possible to install active memory in only one MPCP, and this will be the total Active Memory available. The maximum size of any program executed will be the largest Active Memory chunk. The MPICTerm has 800 / 800 / 800 in Active Memory, largest executable file 800 Mp, total available Active Memory 2400 Mp.

Due to the special architecture of the p-deck, IC like tar baby will only affect one partition of the Active and Storage Memory, as the MPPCP "shows" the IC only one of the available chunks of Active Memory. Thus, deckers can activate copies of a given utility in another Active Memory chunk as usual.

ASIST Interface:
All of the rules regarding the programming and installation of the ASIST Interface are equally valid regarding the p-deck. However, instead of using the MPCP rating in the tasks, the MPPCP rating is used. Thus, the MPICTerm has rating 11 tasks for installing the ASIST Interface. The MPICTerm has Hot ASIST, since a responsive and fast interface is important for this showcase of MPPCP technology.

Hardening:
Hardening is installed as per the normal rules, although the MPPCP rating is used instead of the MPCP rating. The MPICTerm is a legal p-deck, and not meant for combat. It does not have Hardening.

ICCM Biofeedback Filter:
Exchange MPPCP for MPCP. The MPICTerm is a legal p-deck, and not meant for combat. It does not have an ICCM biofeedback filter.

I/O Speed:
Unchanged. The MPICTerm has an I/O speed of 400 Mp, which is respectable, but well under the maximum value of 640 Mp.

Response Increase:
Unchanged. However, two things must be noted. One - The rating of the tasks is the MPPCP rating instead of the MPCP rating (although the maximum value of Response Increase is the same), and two - the p-deck has a penalty to Reaction equal to the number of processors installed on the deck. As the MPICTerm has three processors, it has a penalty of -3 to Reaction. The hot ASIST and the one level of Response Increase installed gives a net initiative rating of (+2+1d6+2+1d6-3) +1+2d6.

Satlink Interface:
Unchanged. Although a versatile option, the MPICTerm is meant as a showcase of p-deck technology, and does not have a satlink.

Storage Memory:
The alterations concerning Storage Memory are quite similar to those concerning Active Memory. The MPICTerm has storage memory equal to 800 / 800 / 800.

Miscellaneous Components:
This step is not changed from making regular decks. The MPICTerm has one Hitcher Jack installed, and has an Advanced Casing (2/2) costing about 1000 nuyen. (Although the Advanced Casing isn't explicitly stated, I wanted a casing that wasn't Level 1, and wasn't Level 2. I called it an Advanced casing, and gave it a cost of 1000 nuyen. It isn't important, and it isn't vital.)

Thus, the stats of the p3-8 MPICTerm is as follows:

MPCP 8 / 8 / 8 - MPPCP 3 (11)
Sensor 8 / Evasion 8 / Bod 8
Active Memory: 800 / 800 / 800
Hot ASIST (+2+1d6) - Response Increase 1 (+2+1d6)
Net Initiative Modification: (+4-3+2d6) +1+2d6
I/O Speed 400 Mp
Storage Memory: 800 / 800 / 800
Advanced Casing: (2/2)
Hitcher Jacks: 1
Mainframe Rating: 1

A suggested nuyen cost of this p-deck would be, say, 2 389 670 nuyen, which might be doubled or tripled to reflect the cost of new technology.


A Sample Scenario Using MPPCP

Here's a quick outline of a scenario where MPPCP technology could be introduced. It isn't much, and it isn't detailed, but it should be enough to showcase a classic snatch-and-run shadowrun, where the object to be retrieved is a p-deck.

Background:
A relatively small, and apparently unaffiliated computer research corporation named Heisenberg Systems, Inc. (HSI) aquired a top-notch computer scientist by the name of dr. Farshad Bohajem. The specialty of dr. Farshad Bohajem is parallel systems, where both of his doctorates was about problems and some solutions around parallel systems. Although a real Fuchi loyalist, Fuchi apparently let him quit and get his current job as the head of the R&D departement at HSI without making a fuss about it.

Now, they have perfected MPPCP technology, and has made a prototype of the MPICTerm, an MPPCP parallel deck that showcases the special qualities of MPPCP. This, of course, is the target of the run against HSI.

Scenario Outline:
The runners get the usual telecom call from their fixer, and whatnot. After getting the run (which is quite well-paid as these things go), they start to do legwork on HSI and the names associated with HSI. It is pretty clear that Fuchi might be involved, yet Knight Errant has the security contract for HSI.

HSI is an R&D corporation, which sells theoretical work about computer systems to various megacorporations interested in such work, for instance Fuchi and MCT. They have a good track record, yet are quite small, with about 14 employees, including their CEO, Chief of Security and Head of R&D. Some of these turn out to be dummies, put there for tax reasons, and the real size of HSI is 11 persons.

HSI is well-protected physically, and not connected to the Matrix (simple fix on a complex problem). Farshad Bohajem is a black belt taekwondo expert, and one of the top ten on computer hardware (Computer B/R 11 or so). He is the brain behind the MPICTerm. Farshad Bohajem is also a mean sunofabitch, and has so far been married three times, getting divorced because he beat his wife. His sabumnim (sensei) doesn't like him very much (Farshad Bohajem is a racist), as the sabumnim (Anghor Strongarm) is an elf. (Twist: He is a Ghost instructor in the martial arts, and is an initiate physical adept. He might be an interesting person to befriend, and might be a very deadly opponent. His Tir connection should not be obvious at all.)

The Chief of Security, Olga Gratangsbotn, is a Norwegian Stallo, which is a more or less human metahuman with unknown abilities. (The GM is encouraged to develop this as much as he wants.) No pictures exist of her at all. An outline of Olga would be someone with the stats of an Ogre or Ork, no penalties to Intelligence, and with the power to Analyze Truth, and become Improved Invisible at will, with some Armed Combat, Firearms and Small Unit Tactics to back it all up with. No matter what they do, getting any fix on Olga should be next-to impossible, with no home address and no pictures.

Quite simply, an average run as those things go. A suggestion about money and Karma might be 35000-45000 nuyen for the MPICTerm and/or research data and/or the breadboarded prototype all together, and about 4-6 Karma.


Future developments in MPPCP

At the moment, the really limiting factor in developing portable mainframes, is the fact that the MPCP rating must be two better than the number of processors, and that the MPPCP rating is dependent on the MPCP rating and number of processors. A future development could be to reduce the MPCP rating necessary to support a parallel architecture, for instance to an MPCP equal to the number of processors, or perhaps even lower.

Another future development might be increasing the mainframe rating, for instance by changing the mainframe rating from the square root of the number of processors, to for instance (processors) to the power of 0.8. This would change the calculations for the p-decks as follows:

p2 - old rating 1 - new rating 1
p3 - old rating 1 - new rating 2
p4 - old rating 2 - new rating 3, i.e., a marked improvement.

Also, so far the MPPCP technology doesn't really support IC. This will likely change as the SOTA advances.


Taken from the pages of Jens-Arthur Leirbakk